Which gates are sequentially cascaded or involved in an entire logic-array of AND-OR-INVERT (AOI) configuration?
A. AND-OR-AND
B. AND-OR-NOT
C. AND-OR-NOR
D. AND-OR-EX-OR
Related Questions on Basic Electronics Engineering Test Questions
What does the group of bits possessing certain level of significance called as?
A. Code
B. Bite
C. Word
D. All of the above
A. OR gate
B. Non-linear mixing gate
C. Both a & b
D. None of the above
A. Buffer circuit
B. Non-linear mixing circuit
C. Coincidence circuit
D. All of the above
A. Output pulse magnitude > largest input pulse
B. Output pulse magnitude < largest input pulse
C. Output pulse magnitude = largest input pulse
D. Output pulse magnitude = smallest input pulse
The highest probable output of an AND gate is acknowledged to be 1 ________.
A. if all inputs are at 1 logic state
B. if all inputs are at 0 logic state
C. if only one input is at 1 logic state
D. Cannot predict